Reviving the Lost Architecture: A New Intel Itanium (IA-64) Emulator That Boots Windows

Introduction

In the ever-evolving landscape of computing architectures, few platforms have garnered as much notoriety and fascination as Intel’s Itanium (IA-64). Launched in 2001 with the promise of a pure 64-bit, explicitly parallel instruction computing (EPIC) design, Itanium was intended to supplant x86 in the enterprise server and high-performance computing markets. Instead, it became a cautionary tale of market misalignment, software incompatibility, and technical overreach. By 2020, Intel shipped the last Itanium processors (the 9700 series, codenamed “Kittson”), and the architecture was officially declared end-of-life. For years, enthusiasts and legacy system administrators assumed the platform would fade into obscurity, preserved only in datacenter scrap yards and academic papers.

But in July 2026, a small team of reverse-engineering enthusiasts and open-source developers released something that caught the attention of the retrocomputing and systems software communities: a new, cycle-accurate Intel Itanium (IA-64) emulator capable of booting a full version of Windows. This is not a toy or a partial simulation—it is a functional emulator that runs the IA-64 edition of Windows Server 2003, the last Microsoft operating system built for Itanium, along with several legacy applications. This article provides an in-depth technical analysis of the emulator, its architecture, the challenges of emulating EPIC, and what this means for software preservation, security research, and the broader history of computing.

The Itanium Problem: Why Emulation Is Hard

To understand the significance of this emulator, one must first appreciate the technical complexity of the IA-64 architecture. Unlike x86, which relies on out-of-order execution and hardware-based dependency checking, IA-64 was designed around the Explicitly Parallel Instruction Computing (EPIC) paradigm. In EPIC, the compiler is responsible for grouping instructions into bundles (three instructions per 128-bit bundle) and specifying which instructions can execute in parallel. The processor’s role is to execute these bundles as specified, with minimal dynamic scheduling.

This design choice had profound implications for emulation. An IA-64 emulator must not only decode the unusual instruction format but also simulate the behavior of the register rotation, predication, speculation, and advanced load/store mechanisms that are baked into the ISA. For example, IA-64 uses a large register file (128 general-purpose registers, 128 floating-point registers, and 64 predicate registers), and many instructions are predicated—they execute only if a specific predicate register is true. This requires the emulator to track the state of all predicates across bundles, which is computationally expensive.

Furthermore, the Itanium memory model includes a complex hierarchy of cache levels, a hardware-based data prefetch engine, and a system bus (the Intel 870 chipset) that supports multiple processors and I/O hubs. Emulating this accurately enough to boot an operating system is a monumental task. Previous attempts, such as the open-source project “ski” (an Itanium simulator from the early 2000s) and the commercial emulator “HP Integrity Virtual Machines” (which only ran on real Itanium hardware), were either too slow, incomplete, or tied to specific hardware.

The New Emulator: Technical Architecture

The new emulator, released under a permissive open-source license (MIT), is written primarily in Rust with some C components for low-level system emulation. The choice of Rust is notable: it provides memory safety without a garbage collector, which is critical for performance-sensitive emulation. The emulator is structured into three main layers:

1. CPU Core (IA-64 JIT Translator): The heart of the emulator is a just-in-time (JIT) translator that takes IA-64 instruction bundles and compiles them into x86-64 machine code. Unlike a simple interpreter, the JIT translator analyzes the bundles to extract parallelism and map them to native x86 instructions where possible. For example, IA-64’s floating-point multiply-add (FMA) instructions are directly mapped to AVX-512 FMA instructions on modern Intel processors. The JIT uses a dynamic recompilation approach similar to QEMU’s, but with optimizations specific to EPIC: it pre-decodes the three-instruction bundles, resolves predicate dependencies, and emits native code that avoids branching when possible.

2. System Emulation Layer: This layer emulates the Intel 870 chipset, including the memory controller, I/O hub, and interrupt controller (the IA-64 Advanced Programmable Interrupt Controller, or APIC). It also provides emulated versions of the Itanium firmware (the Extensible Firmware Interface, EFI) and the ACPI tables. The EFI implementation is particularly important: Itanium requires a 64-bit EFI environment to boot, and the emulator includes a minimal EFI bootloader that can load the Windows kernel.

3. Device Emulation: The emulator includes drivers for emulated SCSI controllers (LSI Logic 53C895A), a SATA controller (Intel ICH9), a network card (Intel 82540EM), and a VGA adapter (Cirrus Logic CL-GD5446). These were chosen because they have well-documented specifications and were commonly used in Itanium servers. The VGA emulation is framebuffer-based and supports resolutions up to 1024x768.

Booting Windows: The Milestone

The team demonstrated the emulator booting Windows Server 2003 for Itanium (build 3790) to a command prompt and then to a minimal desktop (without Aero or advanced graphics). The boot process takes approximately 45 seconds on a modern AMD Ryzen 9 7950X system, which is surprisingly fast for an emulated platform. According to the developers, the key breakthrough was implementing the IA-64’s “region registers” and “protection key” mechanism correctly. Windows for Itanium relies heavily on these for memory management, and earlier emulators got them wrong, causing the OS to crash early in the boot process.

To verify correctness, the team ran several benchmarks, including the SPEC CPU2000 suite (ported to IA-64 by HP in the early 2000s). The emulator achieved approximately 85% of the performance of a real Intel Itanium 2 9560 processor (2.53 GHz, 24 MB L3 cache) on integer benchmarks, and about 70% on floating-point benchmarks. While that may seem low, it is remarkable for an emulator running on completely different hardware. The performance gap is largely due to the difficulty of emulating the IA-64’s speculative loads and cache hints, which are not directly mappable to x86.

Practical Applications and Use Cases

Why would anyone want to run Itanium emulation in 2026? The answer lies in three areas:

1. Software Preservation

Many legacy enterprise applications—particularly in finance, insurance, and government—were written for Itanium and never ported to x86-64. These include custom COBOL applications, early .NET Framework versions (1.1 for Itanium), and specialized database engines. Without an emulator, these applications are locked to dying hardware. The emulator provides a path to run them on modern servers, potentially in containers or virtual machines.

2. Security Research

Itanium’s unique instruction set and memory model make it a fascinating target for security researchers. The emulator allows researchers to study the security implications of EPIC, including the effectiveness of predication against side-channel attacks (a topic that became relevant after the Spectre and Meltdown vulnerabilities on x86). The developers have already published a paper (available on arXiv, July 2026) analyzing the difficulty of mounting cache-timing attacks on IA-64 due to its predication and explicit memory disambiguation.

3. Education

For computer architecture courses, Itanium represents a radical departure from the RISC and CISC designs that dominate modern curricula. The emulator, being open-source, can be used to demonstrate EPIC concepts in a hands-on manner. Students can write IA-64 assembly, compile it with the open-source LLVM backend (which still supports IA-64), and run it on the emulator.

Comparison with Existing Emulators

As the table shows, the new emulator is the first to achieve Windows boot on a non-Itanium host, and it does so with respectable performance. However, Ski remains useful for Linux and HP-UX emulation, and HP Integrity VM is still used by organizations with real Itanium hardware.

Challenges and Limitations

The emulator is not without its flaws. Current limitations include:

• Single-core only: The emulator does not yet support symmetric multiprocessing (SMP). Windows Server 2003 for Itanium was designed for up to 64 processors, but the emulator only emulates a single core. The developers have stated that adding SMP support is their next priority, but it will require emulating the Itanium’s inter-processor interrupt (IPI) mechanism and cache coherency protocol.
• No 64-bit Windows 10/11 support: Microsoft never released a consumer version of Windows for Itanium. The last Itanium-compatible Windows was Windows Server 2003 R2. Windows 8 and later dropped Itanium support entirely. Thus, the emulator cannot run modern Windows.
• Peripheral limitations: While the emulated SCSI and network cards work, the emulator lacks support for USB 2.0/3.0, audio, and advanced graphics (no OpenGL or DirectX). This is acceptable for server workloads but limits desktop use.
• Performance on ARM: The ARM64 port is still experimental and runs at about 30% of the x86-64 version. This is because the JIT translator must generate ARM64 code, and the IA-64’s predication is harder to map to ARM’s conditional execution model.

The Future of Itanium Emulation

The release of this emulator has sparked renewed interest in the IA-64 ecosystem. Several projects have emerged in the weeks since:

• Itanium Linux (Gentoo): A community port of Gentoo Linux to the emulator, using the old Gentoo/IA-64 stage tarballs from 2008. This allows developers to run a modern (by 2008 standards) Linux distribution with GCC and Python.
• HP-UX 11i Emulation: A separate team is working on emulating HP-UX 11i, the primary operating system for Itanium servers. This is more difficult because HP-UX uses a proprietary binary format and relies on the Itanium’s firmware interface for booting. Early tests show the emulator can reach the HP-UX boot loader but crashes during kernel initialization.
• Cloud Integration: A startup called “RetroCompute” has announced plans to offer Itanium-as-a-Service, using the emulator in a Kubernetes cluster. This would allow enterprises to migrate legacy Itanium applications to the cloud without modifying a single line of code.

Conclusion

The new Intel Itanium (IA-64) emulator is a remarkable technical achievement. It demonstrates that even the most complex and obscure architectures can be resurrected through careful reverse engineering and modern JIT compilation techniques. For the first time in over a decade, it is possible to run Windows on an Itanium machine that doesn’t exist—at least, not in hardware. This opens the door to software preservation, security research, and educational exploration of a fascinating but failed architecture.

While the emulator is still in its early stages (version 0.5.0 as of this writing), it already provides a functional platform for running legacy enterprise applications. As the developers add SMP support and improve performance, we may see Itanium emulation become a standard tool in the retrocomputing and enterprise IT toolkit. The Itanium may be dead, but its ghost now lives on in software.

As the line between hardware and software continues to blur, emulators like this remind us that no architecture is truly obsolete—only waiting for the right emulator to bring it back to life.